Introduction
An Introduction to the MV/Family
The MV/Family was the third major family of minicomputers designed and built by the Data General Corporation (“DG”). Each family retained backward-compatibility with the previous ones, so the MVs included (nearly) all 16-bit Eclipse functionality, and the Eclipses in turn included all of the original Nova functionality.
32-Bit, CISC
The MVs were DG’s first 32-bit machines.1 There were four 32-bit accumulators (general purpose registers) and a 16-bit word size; many instructions operated on double-words. There were also four quad-word (64-bit) floating point accumulators. The MV instruction set contained around 400 distinct machine instructions, as compared with c.150 in the Eclipses, and c.16 in the Novas. There were some very complex instructions including WEDIT (which contained its own mini-instructions for manipulating decimal numbers), and a whole set of queue (linked-list) handling instructions.
Memory Protection
As in all of the DG minicomputer families, memory was natively addressed by word, not byte, but in the MVs memory was organised as eight segments separated by barriers called “rings”. The ring mechanism was implemented in hardware and therefore (believed to be) unable to be circumvented by malicious software.2 The innermost ring (ring 0) was the most privileged and contained the kernel of any operating system. Ring 7 - the least privileged - was where user programs usually resided. Under AOS/VS, the four inner rings were treated as system rings, and the outer four as user rings. The total logical (virtual) address space available was 4GB per process, half of which was available for user code under AOS/VS. The original MV/8000 supported a maximum 2MB of physical memory, so the the virtual memory system had to be clever and efficient.
Performance
The first MV machine - the MV/8000 Model I - ran at approximately 1.3MIPS. As the time taken to perform different instructions varied widely DG preferred to used Whetstones when advertising performance (third-parties often used VUPS to compare with DEC’s VAX systems). By the time the last MVs were developed performance had increased to c.30MIPS/processor - so around 180MIPS for the 6-processor MV/60000 Model 6.
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This was how things were presented to the user; in fact to a greater or lesser degree, the MV-series machines were all microcoded and the physical hardware changed a lot over its six or so generations. Eg. in hardware, the MV/10000 CPU was really 104-bit microcoded to implement the 32-bit MV instruction set. ↩︎
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Unfortunately ‘rings’ and ‘segments’ were often treated interchangeably in documentation so the terms became almost synonymous. ↩︎